Power Divider Based on Broadside Slot-Coupled Lines

Article information

J. Electromagn. Eng. Sci. 2026;26(1):110-115

Publication date (electronic) : 2026 January 31

doi : https://doi.org/10.26866/jees.2026.1.r.344

Young Kim

School of Electronic Engineering, Kumoh National Institute of Technology, Gumi, Korea

^*Corresponding Author: Young Kim (e-mail: youngk@kumoh.ac.kr)

Received 2025 April 24; Revised 2025 June 3; Accepted 2025 July 3.

Abstract

I. Introduction

A power divider is a passive component that plays an integral role in radio frequency (RF) and microwave systems. Commonly used power dividers include the Wilkinson power divider [1–3], which is employed for low-power operations, and the Gysel divider [4, 5], which is used for high-power applications. Notably, power dividers are frequently used in amplifiers [6] and antenna feeders [7]. Most power dividers that use conventional coupled transmission lines are fabricated using a method that involves quarter-wavelength transmission lines and edge coupling. However, this method requires maintaining sufficient spacing between the coupled transmission lines, which is difficult to achieve with microstrip technology and often requires a gap of several hundred micrometers, making fabrication challenging in most cases.

Power dividers using coupled transmission lines have been the subject of extensive research, with researchers proposing wideband filtering power dividers with open or short stubs [9–11], power dividers using multi-conductor coupled lines [12, 13], compact wideband unequal in-phase power dividers [14], and power dividers with three unequal-width coupled lines [15]. Nonetheless, power dividers characterized by these couplers share a common challenge—the thin line width and narrow gap between coupled transmission lines prevents easy fabrication.

This study proposes a power divider composed of a broadside slot-coupled line with microstrip lines facing each other on the top and bottom surfaces and a slotted ground plane in the middle. Fig. 1 depicts the 3D structure of the power divider developed based on this configuration. The proposed approach helps realize the desired coupling coefficient, thereby addressing issues related to line width and gap spacing of the coupled lines. Drawing upon this structure, two- and four-way power dividers were designed at a center frequency of 2 GHz, and their performances were verified based on the S-parameter characteristics for power splitting, input matching, output matching, and isolation.

Fig. 1

A 3D configuration of the proposed power divider based on broadside slot-coupled lines.

II. Theory

Fig. 2 depicts a schematic of the proposed power divider based on broadside slot-coupled lines. The Z-parameters of the coupled line constituting the power divider can be formulated as follows:

Fig. 2

Schematic of the proposed power divider based on broadside slot-coupled lines: (a) two-way and (b) four-way.

where the matrix elements can be expressed as follows:

1. Two-Way Power Divider

Since a two-way power divider is characterized by different power division ratios, it should be analyzed using the scattering parameter method rather than conventional even-odd mode analysis. When Port 1 of the power divider is excited and the power division ratio between Ports 2 and 3 is k²( = P₃/P₂), the same voltage appears at Ports 2 and 3, resulting in no current flow between them. The equivalent circuit pertaining to this condition is illustrated in Fig. 3(a). In addition, the equivalent circuit when Port 2 is excited is shown in Fig. 3(b). Notably, isolation can be determined from this circuit.

Fig. 3

Equivalent circuits of the proposed power divider: (a) Port 1 excitation and (b) Port 2 excitation.

By applying conditions I₂ = 0, I₄ = 0 to Eq. (1) considering the equivalent circuit depicted in Fig. 3(a) pertaining to Port 1 excitation, the equation can be rewritten as follows:

(2) (V1V3)=(Z11Z13Z31Z33)(I1I3)

Furthermore, by converting the Z-parameters in Eq. (2) into S-parameters, the conditions for matching and power splitting in the case of Port 1 excitation were obtained as follows:

(3) S11e2=(Z11-Zin1k)(Z33+Zo)-Z13Z31Δz

(4) S21e=2Zin1kZoZ31Δz

(5) S22e=(Z11+Zin1k)(Z33-Zo)-Z13Z31Δz

where Z_in1k (k = 2, 3), while the Δ_Z parameters can be expressed as Z_in12 = (1 + k²)Z_o, Z_in13 = [(1 + k²)/k²] · Z_o, and Δ_Z = (Z₁₁ + Z_in1k) (Z₃₃ + Z_o) − Z₁₃Z₃₁. By substituting the same conditions into Ports 1 and 3 considering Port 1 excitation, S_11e3, S_31e, and S_33e were obtained.

To calculate the isolation between Ports 2 and 3, the equivalent circuit depicted in Fig. 3(b) was employed. By substituting the conditions I_2a + I_2b = 0, I₄ =, V_1a = V_1b = −Z₀(I_1a + I_1b), and V2a-V2bRiso=I2b=-I2a into this circuit, the impedance parameter between Ports 2 and 3 was derived as follows:

(6) (V3aV3b)=(Z11aZ12aZ21aZ22a)(I3aI3b)

where

Z11a=-Z32aZ23aRisaZ12a=-Z31aZ13b2Z0+Z32aZ23bRisoZ21a=-Z31bZ13a2Z0+Z32bZ23aRisoZ22a=-Z32bZ23bRisa

Upon converting the elements in Eq. (6) into their S-parameters, the resulting S_21iso was observed to correspond to the isolation between Ports 2 and 3. Furthermore, drawing on Eqs. (3)–(6), the S-parameters of the proposed power divider can be expressed as follows:

(7a) S11=S11e2+S11e32

(7b) S21=S21e,   S31=S31e

(7c) S22=S22e,   S33=S33e

(7d) S23=S21iso

In addition, the S-parameters of the proposed power divider were obtained based on the following conditions:

Reflection characteristics:

(8) ∣S11∣≤15 dB,         ∣S22∣≤15 dB,         ∣S33∣ ≤15 dB

Coupling characteristics:

(9) ∣S21∣≤20 log(k1+k2)dB,         ∣S31∣ ≤20log(k1+k2)dB

Isolation characteristics:

(10) ∣S32∣ ≤20 dB

The even and odd impedances of the coupled lines were set to Z_oo ≤ Z_oe, and their electrical lengths were set to θ = 90°. The coupled line’s impedance values Z_oe, Z_oo and the isolation resistance value R_iso that satisfies the design conditions of the proposed power divider were determined using reflection and transmission coefficient equations through scattering parameter analysis.

III. Simulation and Experimental Results

To confirm the validity of the proposed design method, a two-way power divider with splitting ratios of 1:1 and 1:2, and a four-way power divider with a splitting ratio of 1:1:1:1 were fabricated considering an operating frequency of 2 GHz.

The dividers were fabricated on an RO-4350B substrate with a dielectric constant of ɛ_r = 3.48, dielectric thickness of h = 0.762 mm, and copper thickness of t = 0.035 mm. Simulations were performed using Microwave Office (version 17), developed by Cadence. The electrical lengths, even and odd impedance values of the coupled line, and isolation resistance of the proposed power divider were calculated using the equations noted in Section II.

The width of microstrip lines and slots for fabricating the broadside slot-coupled line were also obtained using the corresponding equations in Section II. Table 1 summarizes the width and length of microstrip lines and slots of the broadside slot-coupled line employed in the proposed power divider. Notably, the width and length of the broadside slot-coupled line represent the results of an optimization process conducted to identify the values that satisfy the electrical characteristics of the power divider.

Table 1

Calculated dimensions of the width and length of the microstrip lines and slots of the proposed power divider’s broadside slot-coupled line (unit: mm)

Fig. 4(a) and 4(b) present photographs of the front and rear views of the 1:1 power divider, respectively. Transmission line fabrication for this power divider was conducted following an optimal process for achieving power divider characteristics. In addition, an isolation resistor—a 180 Ω Murata product—is also used. Fig. 4(c) and 4(d) show the measured and simulated S-parameters of the power divider with a 1:1 split ratio, respectively. The figures show insertion losses of |S₂₁| = −3.42 dB and |S₃₁| = −3.40 dB. The isolation |S₃₂| exceeds 20 dB. The input return loss |S₁₁| is more than 15 dB, and the output return losses |S₂₂| and |S₃₃| are more than 15 dB at the operating frequency of 2 GHz.

Fig. 4

Photographs, measured S-parameter, and simulated S-parameter characteristics of the proposed 1:1 two-way equal power divider: (a) front view, (b) rear view, and (c) |S₁₁|, |S₂₁|, and |S₃₁|, and (d) |S₃₂|, |S₂₂|, and |S₃₃|.

Fig. 5(a) and 5(b) show photographs of the front and rear views of the 1:2 power divider. Here, too, transmission line fabrication was conducted through an optimal process for achieving power divider characteristics. In addition, the isolation resistor employed is a 192 Ω Murata product. Fig. 5(c) and 5(d) show the measured and simulated S-parameters of the power divider with a 1:2 split ratio, respectively. The figures show insertion losses of |S₂₁| = −2.37 dB and |S₃₁| = −5.06 dB, the isolation |S₃₂| exceeds 20 dB, the input return loss |S₁₁| is greater than 15 dB, and the output return losses |S₂₂| and |S₃₃| are greater than 15 dB at the operating frequency of 2 GHz.

Fig. 5

Photographs, measured S-parameter, and simulated S-parameter characteristics of the proposed 1:2 two-way unequal power divider: (a) front view, (b) rear view, (c) |S₁₁|, |S₂₁|, and |S₃₁|, and (d) |S₃₂|, |S₂₂|, and |S₃₃|.

Finally, Fig. 6(a) and 6(b) show photographs of the front and rear views of the 1:1:1:1 four-way power divider. The fabrication of the transmission line constituting the power divider was conducted by following an optimal process for achieving power divider characteristics. In addition, the isolation resistors R_iso and R_i employed in this configuration are 100 Ω and 50 Ω Murata products. Fig. 6(c)–6(f) present the measured and simulated S-parameters of the proposed four-way power divider with a 1:1:1:1 split ratio. The figures show insertion losses of |S₂₁| = −6.55 dB, |S₃₁| = −6.56 dB, |S₄₁| = −6.55 dB, and |S₅₁| = −6.71 dB. Furthermore, the isolation of |S₃₂|, |S₄₂|, |S₅₂|, |S₄₃|, |S₅₃|, and |S₅₄| exceed 20 dB. The input return loss |S₁₁| is higher than 15 dB, and output return losses |S₂₂|, |S₃₃|, |S₄₄|, and |S₅₅| are higher than 15 dB at the operating frequency of 2 GHz. Table 2 presents a comparison of the proposed power divider with conventional power dividers equipped with microstrip coupled lines.

Fig. 6

Photographs, measured S-parameter, and simulated S-parameter characteristics of the proposed 1:1:1:1 four-way equal power divider: (a) front view, (b) rear view, (c) |S₁₁|, |S₂₁|, |S₃₁|, |S₄₁|, and |S₅₁|, (d) |S₃₂|, |S₄₂|, and |S₅₂|, (e) |S₄₃|, |S₅₃|, and |S₅₄|, and (f) |S₂₂|, |S₃₃|, |S₄₄|, and |S₅₅|.

Table 2

Comparison of the proposed power divider with conventional dividers that use coupled lines

IV. Conclusion

This study presents three power divider designs that feature broadside slot-coupled lines. The structures of the proposed dividers are characterized by microstrips placed on the top and bottom surfaces of the slot-coupled line and slots located on the ground surface in the middle. This configuration made it easy to achieve a high coupling coefficient, thereby simplifying the fabrication process of the power dividers. This structure also offers a compact design and improved isolation, which makes it suitable for integrated system designs using multilayer PCBs. The measured results of the fabricated two- and four-way power dividers at an operating frequency of 2 GHz were satisfactory, achieving a splitting ratio within the tolerance level of the theoretical designed value, a reflection coefficient of 15 dB or higher, and an isolation of 20 dB or higher.

Article information Continued