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SAR ADC for a Multimode Radar Transceiver with Offset Calibration |
Jin-Seop Lee, Hyun-Yeop Lee, Choon-Sik Cho, Young-Jin Kim |
J. Electromagn. Eng. Sci. 2022;22(4):427-433. Published online July 13, 2022 DOI: https://doi.org/10.26866/jees.2022.4.r.105 |
SAR ADC for a Multimode Radar Transceiver with Offset Calibration Mismatch and Offset Calibration in Redundant SAR ADC Calibration of Capacitor Mismatch and Static Comparator Offset in SAR ADC with Digital Redundancy A 2.4 GS/s 10-Bit Time-Interleaved SAR ADC with a Bypass Window and Opportunistic Offset Calibration A 2-GS/s 8b Flash-SAR Time-Interleaved ADC with Background Offset Calibration A Single-Channel 1.75GS/s, 6-Bit Flash-Assisted SAR ADC with Self-Adaptive Timer and On-Chip Offset Calibration A 7b 2.6mW 900MS/s Nonbinary 2-then-3b/cycle SAR ADC with Background Offset Calibration A 3.66 μW 12-bit 1 MS/s SAR ADC with mismatch and offset foreground calibration A 2-Then-1 Bit/Cycle Asynchronous SAR ADC with Background Offset Calibration A 6b 1GS/s 2b/Cycle SAR ADC with Body-Voltage Offset Calibration |